HOW DOES IT WORK?

SRAM 4 Click is based on the CY14B512Q, a 512Kbit nvSRAM memory organized as 64K words of 8 bits each from Infineon. The nvSRAM specifies one million endurance cycles for nonvolatile cells with data retention of a minimum of 20 years. All the reads and writes to nvSRAM happen to the SRAM, which gives nvSRAM the unique capability to handle infinite writes to the memory. The embedded nonvolatile elements incorporate the QuantumTrap technology, making this Click board™ an ideal choice for secure data storage creating the world's most reliable nonvolatile memory.

The CY14B512Q communicates with MCU through a standard SPI interface that enables very high clock speeds up to 40MHz with zero cycle delay read and write cycles. It also supports the two most common modes, SPI Mode 0 and 3, and 104 MHz SPI access speed with special instruction for the read operation. Besides, the SRAM 4 Click also has an additional HOLD signal, routed to the PWM pin of the mikroBUS™ socket labeled as HLD, used to suspend the serial communication without resetting the serial sequence.

The CY14B512Q uses the standard SPI opcodes for memory access. In addition to the general SPI instructions for reading and writing, also provide four special instructions: STORE, RECALL, AutoStore Disable, and AutoStore Enable. The significant benefit of this memory over serial EEPROMs is that all reads and writes to nvSRAM are performed at the speed of the SPI bus with zero cycle delay. Therefore, no wait time is required after any of the memory accesses. Only the STORE and RECALL operations need finite time to complete, and all memory accesses are inhibited during this time.

This Click board™ can be operated only with a 3.3V logic voltage level. The board must perform appropriate logic voltage level conversion before use with MCUs with different logic levels. However, the Click board™ comes equipped with a library containing functions and an example code that can be used, as a reference, for further development.